The present invention relates to a spherical shaped semiconductor device, a flexible printed wiring substrate, and a mounting method of the spherical shaped semiconductor device with the flexible printed wiring substrate.
Regarding spherical shaped semiconductor devices, NIKKEI MICRODEVICES No. 157 issued on Jul. 1, 1998 and Weekly Toyo Keizai issued on Jul. 18, 1998 disclose a spherical semiconductor particle connected to an external printed circuit substrate, which BALL Semiconductor Inc. in U.S.A. has proposed in the U.S. Patent application Ser. Nos. 60/032,340, 08/858,004, and PCT/US97/14922.
The above editions disclose that, as shown in FIG. 9, a bottom face of a spherical shaped semiconductor device 2 is connected to a printed circuit substrate 1 through a plurality of solder balls 3 thereon. According to the NIKKEI MICRODEVICES No. 157, a silicon ball is connected to a printed circuit substrate through electrodes disposed on the surface of the silicon ball. These electrodes are also used to connect a silicon ball to other silicon bails, the consequence of which brings about three-dimensional connections between silicon balls incorporated with various functionalities such as a memory and processor, thus implementing establishment of a system LSI.
However, the above-mentioned conventional mounting method has the following disadvantages.
Firstly, the number of accommodatable input/output connection openings in the spherical shaped semiconductor device 2 are limited. As known, the spherical shaped semiconductor device is three times larger in surface area than a conventional semiconductor device formed on a square shaped silicon circuit substrate. When the spherical shaped semiconductor device is wired according to the same wiring rule as that of the conventional semiconductor device formed on the square-shaped silicon circuit substrate, three times larger number of output connection openings are required to forward an output signal. Recent trends of BGA (Ball Grid Array) or CSP (Chip Size Package) indicate that larger chip size increases the number of contact pins. However, in the above-stated conventional method for mounting the spherical shaped semiconductor device, the spherical shaped semiconductor device 2 is connected to the printed circuit substrate 1 through the solder balls 3 installed on the bottom surface of the spherical shaped semiconductor device 2 and on contact points with other adjacent spherical shaped semiconductor device. Therefore, the number of accommodatable input/output connection openings is limited. In addition, there is another disadvantage that the spherical shaped semiconductor device 2 is in “point” contact with the printed circuit substrate 1 and other adjacent spherical shaped semiconductor devices. This is because the printed circuit substrate 1 is formed in a flat shape and the spherical shaped semiconductor device 2 and the other adjacent devices are formed in a ball-like shape.
Secondly, interfaces between the solder ball 3 and the spherical shaped semiconductor (silicon ball) 2 and between the solder ball 3 and the printed circuit substrate 1 are poor in reliability. This is because the silicon ball 2, solder ball 3, and the printed circuit substrate 1 are each different in a linear expansion coefficient. More specifically, the interfaces repeat expansion and shrinkage by change of temperature, so that stresses are accumulated in the interfaces to generate cracks and to finally lead to disconnection.
Thirdly, in the case of establishing a system LSI (Large Scale Integration) with spherical shaped semiconductor devices (silicon balls), a solder ball is disposed between the silicon balls. In this structure, there more remarkably comes out a harmful effect due to differences of the linear expansion coefficient among the silicon balls, the solder ball and a printed circuit substrate; and stresses are accumulated in the interfaces of the silicon balls. When a buffering section for releasing the stresses is not provided, the stresses are just accumulated, resulting in generation of cracks.
Fourthly, if a copper circuit having flexibility is used for the buffering section as stated above, thickness of the copper circuit should be extremely small. As an example of the copper circuit having flexibility, there is a known product in which a 0.3 μm (3000 Å) thick copper is deposited on a 38 μm thick polyester film by sputtering. However, the copper circuit with such a small thickness fails to supply necessary circuit resistance. Though it is possible to increase the film thickness of the copper circuit, there come disadvantages of decrease in productivity and increase in cost.
On the other hand, another method is to stack copper on a polyimide film with plating. However, when copper is applied to the extent equal in thickness to aluminum foil, this copper circuit degrades in flexibility. As a result, it is impossible to bend the copper circuit with a curvature radius equivalent to approximately one forth of the diameter of the spherical shaped semiconductor device, typically with a curvature radius of approximately 0.25 mm. This is because that copper is infinitely oxidized in the air. Therefore, it should be protected from being exposed to the air. To prevent copper from oxidation, gold plating or solder plating or tin plating is generally performed after applying nickel plating. Covering with a cover film or cover ink is another choice to protect the copper circuit from oxidation. However, there is a disadvantage that such a covering is insufficient in reliability. Besides, protection of the copper surface by using these methods makes the film thicker and harder, resulting in degradation of bendability.